Staff engineer at samsung electronics, South Korea .
Jaehyeong Lee is a dedicated researcher and Staff Engineer at Samsung Electronics, specializing in DRAM BEOL reliability. With a Ph.D. in Materials Engineering, his research focuses on electromigration (EM) and time-dependent dielectric breakdown (TDDB) characteristics in BEOL processes. His work has led to significant insights into the effects of mechanical stress on BEOL TDDB, contributing to the development of a clustering model for enhanced reliability. He has published seven SCI-indexed papers and received the Excellent Poster Award at HyMaP 2017. His commitment to advancing semiconductor reliability through innovative research makes him a strong candidate for the Best Researcher Award.
🌍 Professional Profile:
Scopus
🏆 Suitability for the Best Researcher Award
Jaehyeong Lee’s research on DRAM BEOL reliability addresses critical challenges in semiconductor manufacturing. His studies on electromigration and TDDB have contributed to improving BEOL process reliability in advanced DRAM technology. His expertise in understanding mechanical stress effects on TDDB has led to innovative approaches in clustering models. With seven SCI-indexed publications, he has demonstrated significant contributions to the field. His award-winning research (Excellent Poster Award, HyMaP 2017) and ongoing investigations into process improvements showcase his dedication. As a researcher tackling industry-relevant challenges with impactful solutions, he is well-qualified for the Best Researcher Award.
🎓 Education
Jaehyeong Lee holds a Ph.D. in Materials Engineering, which laid the foundation for his expertise in semiconductor reliability. His doctoral research focused on DRAM BEOL reliability, particularly in electromigration (EM) and time-dependent dielectric breakdown (TDDB) mechanisms. His academic background equipped him with advanced knowledge of materials behavior under extreme scaling conditions, which he applies to his current work at Samsung Electronics. Through his rigorous academic training and specialization in BEOL reliability, he has contributed valuable insights into semiconductor technology. His education has been instrumental in his ability to develop innovative solutions that enhance the longevity and performance of DRAM products.
🏢 Work Experience
Jaehyeong Lee is currently a Staff Engineer at Samsung Electronics, where he researches DRAM BEOL reliability. His experience includes analyzing BEOL manufacturing processes and their effects on electromigration (EM) and TDDB characteristics. He has contributed to the semiconductor industry by investigating mechanical stress factors affecting BEOL TDDB and developing a clustering model to improve reliability. With a strong research background and practical expertise in semiconductor reliability, he has played a pivotal role in addressing key challenges in DRAM technology. His seven published SCI-indexed papers reflect his commitment to advancing BEOL process understanding and reliability. His professional journey highlights his contributions to the innovation and development of high-performance memory devices.
🏅 Awards and Honors
Jaehyeong Lee’s research excellence has been recognized with the Excellent Poster Award at HyMaP 2017, highlighting his contributions to materials engineering and semiconductor reliability. His seven SCI-indexed publications demonstrate his impact in the field of DRAM BEOL reliability. His research findings on electromigration and TDDB have gained recognition in the scientific community, influencing advancements in semiconductor process improvements. His innovative approach to clustering models for mechanical stress effects on TDDB showcases his ability to contribute groundbreaking insights. With a focus on improving semiconductor reliability, his research achievements, academic rigor, and industry contributions make him a deserving candidate for further accolades and recognition in the field.
🔬 Research Focus
Jaehyeong Lee’s research focuses on the degradation characteristics of BEOL reliability in DRAM technology. His work addresses the impact of electromigration (EM) and time-dependent dielectric breakdown (TDDB) on BEOL process reliability. His recent studies on mechanical stress effects on BEOL TDDB aim to improve the stability and efficiency of semiconductor devices. He has also developed a clustering model to analyze and predict TDDB behavior under different manufacturing conditions. His research contributes to overcoming the challenges posed by rapid DRAM scaling. By enhancing BEOL reliability, he plays a crucial role in improving semiconductor performance and longevity, making his research valuable to the advancement of memory technologies.
📊 Publication Top Notes:
Lee, J., Jihyun, B., Woo, B., Byoung-wook, Y. M., Lee, Y. M., Ko, S., Seungbum, & Pae, S., Sangwoo. (2025). Vertical scale-down of Cu/low-k interconnect development for BEOL reliability improvement of 12nm DRAM. Microelectronics Reliability.