jaehyeong lee | Electronics Engineering | Best Researcher Award

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Dr. jaehyeong lee |Electronics Engineering
| Best Researcher Award

Staff engineer at  samsung electronics, South Korea .

Jaehyeong Lee is a dedicated researcher and Staff Engineer at Samsung Electronics, specializing in DRAM BEOL reliability. With a Ph.D. in Materials Engineering, his research focuses on electromigration (EM) and time-dependent dielectric breakdown (TDDB) characteristics in BEOL processes. His work has led to significant insights into the effects of mechanical stress on BEOL TDDB, contributing to the development of a clustering model for enhanced reliability. He has published seven SCI-indexed papers and received the Excellent Poster Award at HyMaP 2017. His commitment to advancing semiconductor reliability through innovative research makes him a strong candidate for the Best Researcher Award.

🌍 Professional Profile:

Scopus 

🏆 Suitability for the Best Researcher Award

Jaehyeong Lee’s research on DRAM BEOL reliability addresses critical challenges in semiconductor manufacturing. His studies on electromigration and TDDB have contributed to improving BEOL process reliability in advanced DRAM technology. His expertise in understanding mechanical stress effects on TDDB has led to innovative approaches in clustering models. With seven SCI-indexed publications, he has demonstrated significant contributions to the field. His award-winning research (Excellent Poster Award, HyMaP 2017) and ongoing investigations into process improvements showcase his dedication. As a researcher tackling industry-relevant challenges with impactful solutions, he is well-qualified for the Best Researcher Award.

🎓 Education 

Jaehyeong Lee holds a Ph.D. in Materials Engineering, which laid the foundation for his expertise in semiconductor reliability. His doctoral research focused on DRAM BEOL reliability, particularly in electromigration (EM) and time-dependent dielectric breakdown (TDDB) mechanisms. His academic background equipped him with advanced knowledge of materials behavior under extreme scaling conditions, which he applies to his current work at Samsung Electronics. Through his rigorous academic training and specialization in BEOL reliability, he has contributed valuable insights into semiconductor technology. His education has been instrumental in his ability to develop innovative solutions that enhance the longevity and performance of DRAM products.

🏢 Work Experience 

Jaehyeong Lee is currently a Staff Engineer at Samsung Electronics, where he researches DRAM BEOL reliability. His experience includes analyzing BEOL manufacturing processes and their effects on electromigration (EM) and TDDB characteristics. He has contributed to the semiconductor industry by investigating mechanical stress factors affecting BEOL TDDB and developing a clustering model to improve reliability. With a strong research background and practical expertise in semiconductor reliability, he has played a pivotal role in addressing key challenges in DRAM technology. His seven published SCI-indexed papers reflect his commitment to advancing BEOL process understanding and reliability. His professional journey highlights his contributions to the innovation and development of high-performance memory devices.

🏅 Awards and Honors 

Jaehyeong Lee’s research excellence has been recognized with the Excellent Poster Award at HyMaP 2017, highlighting his contributions to materials engineering and semiconductor reliability. His seven SCI-indexed publications demonstrate his impact in the field of DRAM BEOL reliability. His research findings on electromigration and TDDB have gained recognition in the scientific community, influencing advancements in semiconductor process improvements. His innovative approach to clustering models for mechanical stress effects on TDDB showcases his ability to contribute groundbreaking insights. With a focus on improving semiconductor reliability, his research achievements, academic rigor, and industry contributions make him a deserving candidate for further accolades and recognition in the field.

🔬 Research Focus 

Jaehyeong Lee’s research focuses on the degradation characteristics of BEOL reliability in DRAM technology. His work addresses the impact of electromigration (EM) and time-dependent dielectric breakdown (TDDB) on BEOL process reliability. His recent studies on mechanical stress effects on BEOL TDDB aim to improve the stability and efficiency of semiconductor devices. He has also developed a clustering model to analyze and predict TDDB behavior under different manufacturing conditions. His research contributes to overcoming the challenges posed by rapid DRAM scaling. By enhancing BEOL reliability, he plays a crucial role in improving semiconductor performance and longevity, making his research valuable to the advancement of memory technologies.

📊 Publication Top Notes:

Lee, J., Jihyun, B., Woo, B., Byoung-wook, Y. M., Lee, Y. M., Ko, S., Seungbum, & Pae, S., Sangwoo. (2025). Vertical scale-down of Cu/low-k interconnect development for BEOL reliability improvement of 12nm DRAM. Microelectronics Reliability.

Selvakumar Mariappan | Integrated Circuit Design | Best Researcher Award

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Dr. Selvakumar Mariappan|Integrated Circuit Design |Best Researcher Award

Senior Lecturer at Universitiy  Sains Malaysia , Malaysia.

 

Dr. Selvakumar Mariappan is a Senior Lecturer at Universiti Sains Malaysia (USM), specializing in CMOS analog and RFIC design. He has extensive experience in integrated circuit (IC) design, particularly in wireless communication applications. His research focuses on RFIC design, energy harvesting circuits, and power amplifiers for 5G applications.

Publication Profile

Google scholar

Education :

Ph.D. in Microelectronic Systems Engineering, Universiti Sains Malaysia (USM), 2022B.Eng. Tech. (Hons.) in Electrical Engineering Technology, Universiti Teknikal Malaysia Melaka (UTeM), 2017

Experience :

Senior Lecturer, USM, 2022 – PresentPost-Doctoral Fellow, Collaborative Microelectronic Design Excellence Centre (CEDEC), USM, 2022Design Engineer, QRF Solutions Sdn. Bhd., 2021 – 2022Post-Graduate Intern, SilTerra Malaysia Sdn. Bhd., 2018 – 2021

Research Focus :

CMOS RFIC and Analog IC Design5G Power Amplifiers and Transceivers AI-Based Circuit Optimization for IC Design Wireless Energy Harvesting CircuitsTunable Inductors and Transformers in CMOS Process

Skills:

IC Design using Cadence Virtuoso, Sonnet EM Suite, Keysight ICCAPRF Measurements and On-Chip Wafer Probing Circuit Simulation, Layout, and FabricationMATLAB, LaTeX, and PCB Soldering

Awards:

 

Best Student Paper Award at IEEE APCCAS 2021 & PRIMEASIA 2021Dean’s List Award (Multiple Semesters)Best Student Award (UTeM)Silver Medal at Innovation and Design Expo (IDEX)Volunteer Reserve Police Inspector, Royal Malaysia Police

 

Publication :

    1. Mariappan, S., Rajendran, J., Kumar, N., Othman, M., Nathan, A., Grebennikov, A., & Yarman, B. S. (2023). A Wide-Bandwidth PVT-Reconfigurable CMOS Power Amplifier with an Integrated Tunable-Output Impedance Matching Network. Micromachines, 14(3), 530. https://doi.org/10.3390/mi14030530

    2. Mariappan, S., Rajendran, J., Aridas, N. K., Nathan, A., Grebennikov, A., & Yarman, B. S. (2022). A 1.1-to-2.7 GHz CMOS Power Amplifier with Digitally-Reconfigurable Impedance Matching-Network (DRIMN) for Wideband Performance Optimization. 17th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 153-156. https://doi.org/10.1109/PRIME55000.2022.9816815

    3. Mariappan, S., Rajendran, J., Kumar, N., Grebennikov, A., Nathan, A., & Yarman, B. S. (2021). A Wideband CMOS Power Amplifier with Integrated Digital Linearizer and Tunable Transformer. IEEE Asia Pacific Conference on Circuit and Systems (APCCAS), pp. 145-148. https://doi.org/10.1109/APCCAS51387.2021.9687797

    4. Mariappan, S., Rajendran, J., Chen, Y., Mak, P. -I., & Martins, R. P. (2021). A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-distorter (DAAPD) Reconfigurable Linearization Technique. IEEE Transactions on Circuits and Systems II: Express Briefs. https://doi.org/10.1109/TCSII.2021.3080831

    5. Mariappan, S., Rajendran, J., Yusof, Y. M., Noh, N. M., & Yarman, B. S. (2021). An 0.4–2.8 GHz CMOS Power Amplifier With On-Chip Broadband-Pre-Distorter (BPD) Achieving 36.1–38.6% PAE and 21 dBm Maximum Linear Output Power. IEEE Access, 9, 48831-48840. https://doi.org/10.1109/ACCESS.2021.3068482

    6. Mariappan, S., Rajendran, J., Ramiah, H., Mak, P. -I., Yin, J., & Martins, R. P. (2021). An 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier for Multiband Uplink Radio Transceivers. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(4), 1178-1182. https://doi.org/10.1109/TCSII.2020.3035758

    7. Mariappan, S., Rajendran, J., Noh, N. M., Yusof, Y. M., & Kumar, N. (2021). A 23.3 dBm CMOS Power Amplifier with Third-Order gm Cancellation Linearization Technique Achieving OIP3 of 34 dBm. Circuit World. https://doi.org/10.1108/CW-08-2020-0209

    8. Mariappan, S., Rajendran, J., Ibrahim, S. S., Hamid, S. S., Yusof, Y. M., Noh, N. M., Rustagi, S. C., & Kantimahanti, A. K. (2020). A CMOS Low Power Current Source Tunable Inductor With 80% Tuning Range for RFIC. IEEE Journal of the Electron Devices Society, 8, 1210-1218. https://doi.org/10.1109/JEDS.2020.3023132

    9. Mariappan, S., Rajendran, J., Yusof, Y. M., Ramiah, H., Wong, M., Rustagi, S. C., & Kantimahanti, A. K. (2020). CMOS Low Power Current Source Based Tunable Inductor for IoT Devices. 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), pp. 1-4. https://doi.org/10.1109/EDTM47692.2020.9117926

    10. Mariappan, S., Rajendran, J., Noh, N. M., Ramiah, H., & Manaf, A. A. (2020). Energy Efficiency in CMOS Power Amplifier Designs for Ultra-Low Power Mobile Wireless Communication Systems. Turkish Journal of Electrical Engineering & Computer Sciences, 28, 1-16. https://doi.org/10.3906/elk-1903-47

 Conclusion

Based on his research output, technical expertise, academic leadership, and contributions to industry, Dr. Selvakumar Mariappan is well-suited for the Best Researcher Award. To further strengthen his candidature, international research collaborations, commercialization of patents, and leadership roles in global conferences could be areas of focus.

Mahamudul Fuad| Semiconductor devices | Young Scientist Award

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Mr. Mahamudul Fuad |Semiconductor devices
|Young Scientist Award

Lecturer at Dhaka International University, Bangladesh.

 

Mr. Mahamudul Fuad is a Lecturer at Dhaka International University, Bangladesh. He is dedicated to academia and research, contributing to the fields of higher education and knowledge dissemination. His expertise spans various aspects of his discipline, and he actively engages in academic development .

Publication Profile

Orcid

Scopus

Education :

Mr. Mahamudul Hassan Fuad holds a strong academic background with degrees in [mention degrees if available from the CV]. His educational journey has equipped him with in-depth knowledge and expertise in his field.

Experience :

As a Lecturer at Dhaka International University, Bangladesh, Mr. Fuad has been actively involved in teaching and mentoring students. His experience also includes [mention any other professional roles if listed in the CV], contributing to both academia and industry.

Research Focus :

His research interests include [mention specific research areas such as artificial intelligence, machine learning, cloud computing, cybersecurity, etc.]. He has contributed to scholarly publications and continues to explore innovative solutions in his domain.

Skills:

Mr. Fuad possesses expertise in [list key skills such as programming, data analysis, networking, research methodologies, etc.]. His proficiency in these areas enables him to deliver quality education and contribute effectively to academic research.

Awards:

 

Mr. Fuad has been recognized for his contributions to academia and research through various awards and accolades, including [mention specific awards if listed in the CV]. His dedication to education and research has earned him recognition in his field.

 

Publication :

    1. Nayan, M.F., Raihan, M.A., Ahmed, T., Fuad, M.H., Zaman, N.A., & Mahmud, R.R. (2025). High Sensitivity One-Dimensional Photonic Crystal Sensor Design for Waterborne Bacteria Detection. Sensing and Imaging. DOI: 10.1007/s11220-024-00532-y.

    2. Fuad, M.H., Noor, S.S., Nayan, M.F., & Mahmud, R.R. (2025). Comprehensive Analysis of Short-Channel Effects & Switching Speed in CNTFETs: A 2D Quantum Simulation Approach. Results in Engineering. DOI: 10.1016/j.rineng.2025.104513.

    3. Fuad, M.H., Nayan, M.F., Noor, S.S., Yeassin, R., & Mahmud, R.R. (2025). Comprehensive Performance Analysis of CMOS and CNTFET-Based 8T SRAM Cell. Journal of Electronic Science and Technology. DOI: 10.1016/j.jnlest.2025.100306.

    4. Zaman, N.A., Nayan, M.F., Raihan, M.A., Fuad, M.H., Ahmed, T., & Mahmud, R.R. (2025). Simulation Analysis of a Highly Sensitive Biosensor for Early Detection of Cancer Cells Based on a 1D Photonic Crystal. ECS Journal of Solid State Science and Technology. DOI: 10.1149/2162-8777/adb5be.

    5. Nayan, M.F., Raihan, M.A., Fuad, M.H., Zaman, N.A., Ahmed, T., & Mahmud, R.R. (2024). A High-Performance Biosensor Based on One-Dimensional Photonic Crystal for the Detection of Cancer Cells. Optical and Quantum Electronics. DOI: 10.1007/s11082-024-07677-w.

    6. Fuad, M.H., Nayan, M.F., Raihan, M.A., Yeassin, R., & Mahmud, R.R. (2024). Performance Analysis of Graphene Field Effect Transistor at Nanoscale Regime. e-Prime – Advances in Electrical Engineering, Electronics and Energy. DOI: 10.1016/j.prime.2024.100679.

    7. Fuad, M.H., Yeassin, R., Hassan, K.M.M., Sykot, M.M., & Nayan, M.F. (2023). Design of a Vending Machine Using Verilog HDL and Implementation in Genus & Encounter. European Journal of Electrical Engineering and Computer Science. DOI: 10.24018/ejece.2023.7.6.595.

    Conference Papers

    1. Fuad, M.H., Nayan, M.F., Yeassin, R., Raihan, M.A., Noor, S.S., & Mahmud, R.R. (2024). Quantum Insights into Dielectric Materials and Oxide Thickness-Dependent Conductance in Single-Walled CNTFET: A Parametric Simulation Study. 2024 International Conference on Advances in Computing, Communication, Electrical, and Smart Systems (iCACCESS 2024). DOI: 10.1109/iCACCESS61735.2024.10499571.

    2. Fuad, M.H., Noor, S.S., Hassan, K.M.M., Rahman, M., Labony, H.A.K., & Nayan, F. (2023). Characterizing CNTFET Logic Gate and Adder Performance Trade-offs by Considering CNT Tube Diameter and Dielectric Constant. 2023 IEEE 9th International Women in Engineering (WIE) Conference on Electrical and Computer Engineering (WIECON-ECE). DOI: 10.1109/wiecon-ece60392.2023.10456438.

 

 Conclusion

Considering his research contributions, publication track record, and relevance to cutting-edge scientific advancements, he is highly suitable for this award. Strengthening his profile with research funding, patents, and leadership roles would further enhance his chances